The present disclosure generally relates to memory architecture, and more specifically, to testing of memory cells in a semiconductor memory array.
As the design of semiconductor memory arrays advances over time, the number and density of memory cells in a memory array generally increases. As a result, the quality of the memory cells of a memory array may fluctuate. In particular, relatively weak memory cells can change their cell content data during a read operation. Memory array testing may be required to determine and/or monitor the quality of memory cells. In particular, read stability memory cells may be tested and/or monitored to ensure that it is at sufficient during the entire estimated lifetime of the memory array. Traditionally, a supplementary power supply, separate from a supply voltage VDD, has been provided for resell testing. However, providing a supplementary power supply can caused increased difficulties in wire routing to the memory array and within a host integrated circuit (IC) in general.